View TPS717XX_739616.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

TPS717XX
www.ti.com
SBVS068A - FEBRUARY 2006 - REVISED MARCH 2006
Low Noise, High-Bandwidth PSRR Low-Dropout 150mA Linear Regulator in SC70-5
FEATURES
* * * 150mA Low-Dropout Regulator with Enable Low IQ: 50A (typical) Available in Multiple Output Versions: - Fixed Output with Voltages from 0.9V to 3.3V Using Innovative Factory EEPROM Programming - Adjustable Output Voltage from 0.9V to 6.2V Ultra-High PSRR: - 70dB at 1kHz, 67dB at 100kHz and 45dB at 1MHz Low Noise: 30V typical (100Hz to 100kHz) Stable with a 1.0F Ceramic Capacitor Excellent Load/Line Transient Response 3% Overall Accuracy (over Load/Line/Temp) Over-Current and Over-Temperature Protection Very Low Dropout: 170mV Typical at 150mA Small SC70-5 and 2mm x 2mm SON-6 (Q2 2006) Packages
DESCRIPTION
The TPS717XX family of low-dropout (LDO), low-power linear regulators offers very high power supply rejection (PSRR) while maintaining very low 50A ground current in an ultra-small, five-pin SC70 package. The family uses an advanced BiCMOS process and a PMOSFET pass device to achieve fast start-up, very low noise, excellent transient response, and excellent PSRR performance. The TPS717XX is stable with a 1.0F ceramic output capacitor, and uses a precision voltage reference and feedback loop to achieve a worst-case accuracy of 3% over all load, line, process, and temperature variations. It is fully specified from TJ = -40C to +125C and is offered in a small, five-pin SC70 package, which is ideal for small form factor portable equipment such as wireless handsets and PDAs.
*
* * * * * * *
APPLICATIONS
* * * Mobile Phone Handsets Wireless LAN, BluetoothTM PDAs and Smartphones
TPS717XX DCK SC70-5 PACKAGE (TOP VIEW) VIN IN GND EN 1 2 3 4 NR/FB 5 OUT 1mF Ceramic EN IN GND OUT TPS717XX NR VOUT 60 80 70 150mA 10mA
PSRR (dB)
1mF Ceramic
50 40 75mA 30 20 10 COUT = 1mF CNR = 10nF 10 100 1k 100k 10k Frequency (Hz) 1M 10M
TPS717XX DRV 2mm x 2mm SON (TOP VIEW) OUT NR/FB GND 1 2 3 GND 6 5 4 IN N/C EN
VEN
0.01mF (Optional)
Typical Application Circuit for Fixed Voltage Versions
0
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Bluetooth is a trademark of Bluetooth SIG, Inc. All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright (c) 2006, Texas Instruments Incorporated
TPS717XX
www.ti.com
SBVS068A - FEBRUARY 2006 - REVISED MARCH 2006
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION (1)
PRODUCT TPS717XXyyyz VOUT (2) XX is nominal output voltage (for example, 28 = 2.8V, 285 = 2.85V, 01 = Adjustable). YYY is package designator. Z is package quantity.
(1) (2)
For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. Output voltages from 0.9V to 3.3V in 50mV increments are available through the use of innovative factory EEPROM programming; minimum order quantities may apply. Contact factory for details and availability.
ABSOLUTE MAXIMUM RATINGS
Over operating temperature range (unless otherwise noted) (1). All voltages are with respect to GND.
PARAMETER Input voltage range, VIN Feedback input voltage range, VFB , VNR Enable voltage range, VEN Output voltage range, VOUT Maximum output current, IOUT Continuous total power dissipation, PDISS Junction temperature range, TJ Storage junction temperature range , TSTG ESD rating, HBM ESD rating, CDM (1) (2) TPS717XX -0.3 to +7.0 -0.3 to +3.6 -0.3 to VIN + 0.3V (2) -0.3 to +7.0 Internally limited See Dissipation Ratings Table -55 to +150 -55 to +150 2 500 C C kV V UNIT V V V V
Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied. VEN absolute maximum rating is VIN + 0.3V or +7.0V, whichever is greater.
DISSIPATION RATINGS
BOARD Low-K (1) High-K (2) Low-K (1) High-K (2) (1) (2) PACKAGE DCK DCK DRV DRV RJC 165C/W 165C/W 20C/W 20C/W RJA 395C/W 315C/W 140C/W 65C/W DERATING FACTOR ABOVE TA = 25C 2.5mW/C 3.2mW/C 7.1mW/C 15.4mW/C TA < 25C 250mW 320mW 715mW 1540mW TA = 70C 140mW 175mW 395mW 845mW TA = 85C 100mW 130mW 285mW 615mW
The JEDEC low-K (1s) board used to derive this data was a 3in x 3in, two-layer board with 2-ounce copper traces on top of the board. The JEDEC high-K (2s2p) board used to derive this data was a 3in x 3in, multilayer board with 1-ounce internal power and ground planes and 2-ounce copper traces on top and bottom of the board.
2
TPS717XX
www.ti.com
SBVS068A - FEBRUARY 2006 - REVISED MARCH 2006
ELECTRICAL CHARACTERISTICS
Over operating temperature range (TJ = -40C to +125C), VIN = VOUT(TYP) + 0.5V or 2.5V, whichever is greater; IOUT = 0.5mA, VEN = VIN, COUT = 1.0F, CNR = 0.01F, unless otherwise noted. For TPS71701, VOUT = 2.8V. Typical values are at TJ = +25C.
PARAMETER VIN VFB VOUT Input voltage range (1) Internal reference (TPS71701) Output voltage range (TPS71701) Nominal VOUT Output accuracy (1) Over VIN, IOUT, Temp (2) TJ = +25C VOUT + 0.5V VIN 6.5V 0mA IOUT 150mA VOUT(NOM) + 0.5V VIN 6.5V, IOUT = 5mA 0mA IOUT 150mA IOUT = 150mA VOUT = 0.9 x VOUT(NOM) IOUT = 0.1mA IOUT = 150mA VEN 0.4V, 2.5V VIN < 4.5V, TJ = -40C to +85C VEN 0.4V, 4.5V VIN 6.5V, TJ = -40C to +85C f = 100Hz PSRR Power-supply rejection ratio VIN = 3.8V, VOUT = 2.8V, IOUT = 150mA f = 1kHz f = 10kHz f = 100kHz f = 1MHz Output noise voltage BW = 100Hz to 100kHz, VIN = 3.8V, VOUT = 2.8V, IOUT = 10mA Startup time VOUT = 90% VOUT(NOM), RL = 19, COUT = 1.0F Enable high (enabled) Enable low (shutdown) Enable pin current, enabled Under-voltage lockout Hysteresis Thermal shutdown temperature Operating junction temperature EN = 6.5V VIN rising VIN falling Shutdown, temperature increasing Reset, temperature decreasing -40 2.41 CNR = none CNR = 0.001F CNR = 0.01F CNR = 0.1F 0.9V VOUT 1.6V, CNR = 0.001F 1.6V < VOUT < VMAX, CNR = 0.01F VIN 5.5V 5.5V < VIN 6.5V 1.2 1.25 0 0.02 2.45 150 +160 +140 +125 200 TEST CONDITIONS MIN 2.5 0.790 0.9 -0.05 -3.0 1.5 125 120 170 325 50 100 0.20 0.90 0.02 70 70 67 67 45 95 x VOUT 25 x VOUT 12.5 x VOUT 11.5 x VOUT 0.700 0.160 6.5 6.5 0.4 1.0 2.49 1.0 1.5 300 500 80 0.800 TYP MAX 6.5 0.810 6.5 - VDO +0.06 +3.0 UNIT V V V % % V/V V/mA mV mA A A A A A dB dB dB dB dB VRMS VRMS VRMS VRMS ms ms V V V A V mV C C C
VOUT%/ VIN
Line regulation
(1)
VOUT%/ IOUT Load regulation VDO ICL IGND Dropout (VIN = VOUT(NOM) - 0.1V) Output current limit Ground pin current voltage (3)
ISHDN
Shutdown current (IGND) Feedback pin current (TPS71701)
IFB
VN
TSTR
VEN(HI) VEN(LO) IEN(HI) UVLO TSD TJ (1) (2) (3)
Minimum VIN = VOUT + VDO or 2.5V, whichever is greater. Does not include external resistor tolerences. VDO is not measured for devices with VOUT(NOM) < 2.6V because minimum VIN = 2.5V.
3
TPS717XX
www.ti.com
SBVS068A - FEBRUARY 2006 - REVISED MARCH 2006
DEVICE INFORMATION FUNCTIONAL BLOCK DIAGRAMS
IN OUT
2.5mA Current Limit EN Thermal Shutdown UVLO
Quickstart 1.20V Bandgap 360kW 0.8V 640kW VOUT 1.6V VOUT > 1.6V NR 250kW
GND
Figure 1. Fixed Voltage Versions
IN
OUT
Current Limit EN Thermal Shutdown UVLO 3.3MW
1.20V Bandgap 360kW 0.8V 250kW 640kW FB
GND
Figure 2. Adjustable Voltage Version
4
TPS717XX
www.ti.com
SBVS068A - FEBRUARY 2006 - REVISED MARCH 2006
DEVICE INFORMATION (continued) PIN CONFIGURATIONS
TPS717XX DCK SC70-5 PACKAGE (TOP VIEW) IN GND EN 1 2 3 4 NR/FB 5 OUT OUT NR/FB GND TPS717XX DRV 2mm x 2mm SON (TOP VIEW) 1 2 3 GND 6 5 4 IN N/C EN
(1)
Note (1): NC = Not connected
Table 1. PIN DESCRIPTIONS
TPS717XX NAME IN GND EN NR FB OUT SC70 1 2 3 4 4 5 SON 6 3 4 2 2 1 DESCRIPTION Input to the regulator. Ground. Driving the enable pin (EN) high turns on the regulator. Driving this pin low puts the regulator into standby mode, thereby reducing operating current. Fixed voltage versions only. Connecting an external capacitor to this terminal bypasses noise generated by the internal bandgap, lowering output noise. Adjustable voltage version only. The voltage at this pin is fed to the error amplifier. A resistor divider from OUT to FB sets the output voltage when in regulation. Output of the regulator. A small capacitor is needed from this pin to ground to assure stability; a 1.0F ceramic capacitor is adequate.
5
TPS717XX
www.ti.com
SBVS068A - FEBRUARY 2006 - REVISED MARCH 2006
TYPICAL CHARACTERISTICS
Over operating temperature range (TJ = -40C to +125C), VIN = VOUT(TYP) + 0.5V or 2.5V, whichever is greater; IOUT = 0.5mA, VEN = VIN, COUT = 1.0F, CNR = 0.01F, unless otherwise noted. For TPS71701, VOUT = 2.8V. Typical values are at TJ = +25C. LOAD REGULATION
50 40 30 20 TJ = -40C TJ = +25C TJ = +85C TJ = +125C 50 40 30 20
LOAD REGULATION UNDER LIGHT LOADS
TJ = -40C TJ = +25C TJ = +85C TJ = +125C
DVOUT (mV)
DVOUT (mV)
10 0 -10 -20 -30 -40 -50 0 50 IOUT (mA) 100 150
10 0 -10 -20 -30 -40 -50 0 1 2 IOUT (mA) 3 4 5
Figure 3. LINE REGULATION IOUT = 5mA
1.0 0.8 0.6 0.4 TJ = -40C TJ = +25C TJ = +85C TJ = +125C 3.0 2.0 1.0
Figure 4. LINE REGULATION IOUT = 150mA
TJ = -40C TJ = +25C TJ = +85C TJ = +125C
DVOUT (%)
0.2 0 -0.2 -0.4 -0.6 -0.8 -1.0 2.5 3.5 4.5 VIN (V) 5.5 6.5
DVOUT (%)
0 -1.0 -2.0 -3.0 2.5 3.5 4.5 VIN (V) 5.5 6.5
Figure 5. OUTPUT VOLTAGE vs TEMPERATURE
2.0 1.5 1.0 200 IOUT = 5mA 250
Figure 6. DROPOUT VOLTAGE vs OUTPUT CURRENT
TJ = +125C
DVOUT (%)
VDO (mV)
0.5 0 -0.5 -1.0 IOUT = 150mA -1.5 -2.0 -40 -25 -10 5 20 35 50 TJ (C) 65 80
150
TJ = +85C
IOUT = 100mA
100 TJ = +25C 50 TJ = -40C 0
95 110 125
0
50 IOUT (mA)
100
150
Figure 7.
Figure 8.
6
TPS717XX
www.ti.com
SBVS068A - FEBRUARY 2006 - REVISED MARCH 2006
TYPICAL CHARACTERISTICS (continued)
Over operating temperature range (TJ = -40C to +125C), VIN = VOUT(TYP) + 0.5V or 2.5V, whichever is greater; IOUT = 0.5mA, VEN = VIN, COUT = 1.0F, CNR = 0.01F, unless otherwise noted. For TPS71701, VOUT = 2.8V. Typical values are at TJ = +25C. DROPOUT VOLTAGE vs TEMPERATURE
300 250 200 150 IOUT = 150mA 120
GROUND PIN CURRENT vs INPUT VOLTAGE
VOUT = 2.8V
VDO (mV)
150 100 50
IOUT = 150mA
IGND (mA)
90
60
30 IOUT = 10mA
IOUT = 100mA
0 -40 -25 -10 5 20 35 50 TJ (C) 65 80 95 110 125
0 2.5 3.5 4.5 VIN (V) 5.5 6.5
Figure 9. GROUND PIN CURRENT vs OUTPUT CURRENT
150 150 IOUT = 150mA 120 120
Figure 10. GROUND PIN CURRENT vs TEMPERATURE (ENABLED)
IGND (mA)
60
IGND (mA)
90
90
60
30
30
IOUT = 100mA
0 0 50 IOUT (mA) 100 150
0 -40 -25 -10 5 20 35 50 TJ (C) 65 80 95 110 125
Figure 11. GROUND PIN CURRENT vs TEMPERATURE (DISABLED)
5 VEN = 4.4V 4 500 TJ = -40C TJ = +25C 400 TJ = +85C 600
Figure 12. CURRENT LIMIT vs INPUT VOLTAGE
IGND (mA)
3
2 VIN = 6.5V 1 VIN = 3.3V 0 -40 -25 -10 5 20 35 50 TJ (C) 65 80 95 110 125 VIN = 4.5V
IGND (mA)
300 TJ = +125C 200 2.5 3.5 4.5 VIN (V) 5.5 6.5
Figure 13.
Figure 14.
7
TPS717XX
www.ti.com
SBVS068A - FEBRUARY 2006 - REVISED MARCH 2006
TYPICAL CHARACTERISTICS (continued)
Over operating temperature range (TJ = -40C to +125C), VIN = VOUT(TYP) + 0.5V or 2.5V, whichever is greater; IOUT = 0.5mA, VEN = VIN, COUT = 1.0F, CNR = 0.01F, unless otherwise noted. For TPS71701, VOUT = 2.8V. Typical values are at TJ = +25C. POWER-SUPPLY RIPPLE REJECTION vs FREQUENCY (VIN - VOUT = 1V)
80 70 60 150mA 10mA 80 70 60 150mA
POWER-SUPPLY RIPPLE REJECTION vs FREQUENCY (VIN - VOUT = 0.5V)
10mA 75mA
PSRR (dB)
40 75mA 30 20 10 0 10 100 1k 100k 10k Frequency (Hz) 1M 10M COUT = 1mF CNR = 10nF
PSRR (dB)
50
50 40 30 20 10 0 10 100 1k 100k 10k Frequency (Hz) 1M 10M COUT = 1mF CNR = 10nF
Figure 15. POWER-SUPPLY RIPPLE REJECTION vs FREQUENCY (VIN - VOUT = 0.25V)
80 70 60 10mA 80 70 60
Figure 16. POWER-SUPPLY RIPPLE REJECTION vs FREQUENCY (VIN - VOUT = 1V)
10mA
PSRR (dB)
40 150mA 30 20 10 0 10 100 1k 100k 10k Frequency (Hz) 1M 10M COUT = 10mF CNR = 10nF
PSRR (dB)
50
75mA
50 40 30 20 10 0 10 100 1k 100k 10k Frequency (Hz) 1M 10M COUT = 10mF CNR = 10nF 150mA
Figure 17. POWER-SUPPLY RIPPLE REJECTION vs FREQUENCY (VIN - VOUT = 0.25V)
80 70 60 10mA 80 70
Figure 18. POWER-SUPPLY RIPPLE REJECTION vs FREQUENCY (VIN - VOUT = 1V)
10mA 60 50 40 30 20 10 0 10 100 1k 100k 10k Frequency (Hz) 1M 10M COUT = 10mF CNR = 10nF 150mA 50 40 30 20 10 0 10 100 1k 100k 10k Frequency (Hz) 1M 10M COUT = 10mF CNR = 0nF 150mA
PSRR (dB)
Figure 19.
PSRR (dB)
Figure 20.
8
TPS717XX
www.ti.com
SBVS068A - FEBRUARY 2006 - REVISED MARCH 2006
TYPICAL CHARACTERISTICS (continued)
Over operating temperature range (TJ = -40C to +125C), VIN = VOUT(TYP) + 0.5V or 2.5V, whichever is greater; IOUT = 0.5mA, VEN = VIN, COUT = 1.0F, CNR = 0.01F, unless otherwise noted. For TPS71701, VOUT = 2.8V. Typical values are at TJ = +25C. POWER-SUPPLY RIPPLE REJECTION vs (VIN - VOUT)
80 70 60 10kHz 100kHz 1MHz 1kHz 80 70 60 100kHz 10kHz
POWER-SUPPLY RIPPLE REJECTION vs (VIN - VOUT)
1kHz
PSRR (dB)
40 30 20 10 0 0 0.5 1.0 1.5 2.0 2.5 VIN - VOUT (V) 3.0
PSRR (dB)
50
50 40 30 20 10 0 IOUT = 75mA COUT = 1mF CNR = 10nF 0 0.5 1.0 1.5 2.0 2.5 VIN - VOUT (V) 3.0 3.5 4.0 1MHz
IOUT = 10mA COUT = 1mF CNR = 10nF 3.5 4.0
Figure 21. POWER-SUPPLY RIPPLE REJECTION vs (VIN - VOUT)
70 60 10kHz 1kHz 100kHz
Figure 22. OUTPUT SPECTRAL NOISE DENSITY vs OUTPUT CURRENT
Output Spectral Noise Density (nVOHz)
25 IOUT = 150mA 20 IOUT = 10mA 15 COUT = 1mF CNR = 10nF
80
PSRR (dB)
50 40 30 20 10 0 0 0.5 1.0 1.5 2.0 2.5 VIN - VOUT (V) IOUT = 150mA COUT = 1mF CNR = 10nF 3.0 3.5 4.0 1MHz
10
5
0 100 1k Frequency (Hz) 10k 100k
Figure 23. OUTPUT SPECTRAL NOISE DENSITY vs OUTPUT CAPACITANCE
Output Spectral Noise Density (nVOHz)
IOUT = 10mA CNR = 10nF COUT = 10mF
Figure 24. OUTPUT SPECTRAL NOISE DENSITY vs NOISE REDUCTION
Output Spectral Noise Density (nVOHz)
90 80 70 60 50 40 30 20 10 0 100 1k Frequency (Hz) 10k 100k
CNR = 100nF
25
IOUT = 10mA COUT = 1mF
20
15 COUT = 1mF 10
CNR = 10nF
CNR = 0nF CNR = 1nF
5
0 100 1k Frequency (Hz) 10k 100k
Figure 25.
Figure 26.
9
TPS717XX
www.ti.com
SBVS068A - FEBRUARY 2006 - REVISED MARCH 2006
TYPICAL CHARACTERISTICS (continued)
Over operating temperature range (TJ = -40C to +125C), VIN = VOUT(TYP) + 0.5V or 2.5V, whichever is greater; IOUT = 0.5mA, VEN = VIN, COUT = 1.0F, CNR = 0.01F, unless otherwise noted. For TPS71701, VOUT = 2.8V. Typical values are at TJ = +25C. TOTAL OUTPUT NOISE vs NOISE REDUCTION
300 270 240 IOUT = 10mA COUT = 1mF 50 45 40
TOTAL OUTPUT NOISE vs OUTPUT CAPACITANCE
VOUT = 2.8V, CNR = 10nF VOUT = 1.3V, CNR = 1nF
Total Noise (mVRMS)
Total Noise (mVRMS)
210 180 150 120 90 60 30 0 0 1 CNR (nF) 10 100
35 30 25 20 15 10 5 0 0 5 10 15 COUT (mF) 20 25
Figure 27. LINE TRANSIENT RESPONSE
Figure 28. LOAD TRANSIENT RESPONSE
VIN = 3.3V COUT = 1mF
10mV/div dVIN = 1V/ms dt 6.5V
VOUT 20mV/div
COUT = 1mF VOUT
150mA
1V/div
3.3V 100ms/div
VIN
40mV/div
1mA 100ms/div
IOUT
Figure 29. TURN-ON RESPONSE
COUT = 1mF VOUT 6 VOUT 5
Figure 30. POWER-UP/POWER-DOWN
VIN IOUT = 150mA
Volts
1V/div
COUT = 10mF
4 3 2 VOUT
1V/div 6.5V VIN 4V/div 0V
1 0
50ms/div
Figure 31.
Figure 32.
10
TPS717XX
www.ti.com
SBVS068A - FEBRUARY 2006 - REVISED MARCH 2006
APPLICATION INFORMATION
The TPS717XX belongs to a family of new generation LDO regulators that uses innovative circuitry to achieve ultra-wide bandwidth and high loop gain, resulting in extremely high PSRR (up to 1MHz) at very low headroom (VIN - VOUT). Fixed voltage versions provide a noise reduction pin to bypass noise generated by the bandgap reference and to improve PSRR while a quick-start circuit fast-charges this capacitor. These features, combined with low noise, enable, low ground pin current and ultra-small packaging, make this part ideal for portable applications. This family of regulators offers sub-bandgap output voltages, current limit and thermal protection, and is fully specified from -40C to +125C. Figure 33 shows the basic circuit connections for the fixed voltage options. Figure 34 gives the connections for the adjustable output version (TPS71701). Note that the NR pin is not available on the adjustable version.
Optional 1.0mF input capacitor. May improve source impedance, noise or PSRR. VIN IN EN GND OUT TPS717XX NR 1mF Ceramic VOUT
For the adjustable version (TPS71701), the NR pin is replaced with a feedback (FB) pin. The voltage on this pin sets the output voltage and is determined by the values of R1 and R2. The values of R1 and R2 can be calculated for any voltage using the formula given in Equation 1:
VOUT =
(R1 + R2 ) x 0.800, R2 ~ 320kW R2
(1)
The value of R2 directly impacts the stability of the device and should be chosen at approximately 160k or 320k. Sample resistor values for common output voltages are shown in Table 2. Table 2. Sample 1% Resistor Values for Common Output Voltages
VOUT 1.0 1.2 1.5 1.8 2.5 3.3 5.0 R1 80.6k 162k 294k 402k 665k 1.02M 1.74M R2 324k 324k 332k 324k 316k 324k 332k
Input and Output Capacitor Requirements
Although an input capacitor is not required for stability, it is good analog design practice to connect a 0.1F to 1.0F low equivalent series resistance (ESR) capacitor across the input supply near the regulator. This capacitor will counteract reactive input sources and improve transient response, noise rejection, and ripple rejection. A higher-value capacitor may be necessary if large, fast rise-time load transients are anticipated or if the device is located several inches from the power source. If source impedance is not sufficiently low, a 0.1F input capacitor may be necessary to ensure stability.
VEN
Optional 0.01mF bypass capacitor to reduce output noise and increase PSRR.
Figure 33. Typical Application Circuit (Fixed Voltage Versions)
Optional 1.0mF input capacitor. May improve source impedance, noise or PSRR. VIN IN OUT TPS71701 EN GND FB R2 VEN R1 VOUT 1mF Ceramic
The TPS717XX is designed to be stable with standard ceramic capacitors of values 1.0F or larger. X5Rand X7R-type capacitors are best because they have minimal variation in value and ESR over temperature. Maximum ESR should be < 1.0. The TPS717 implements an innovative internal compensation circuit that does not require a feedback capacitor across R2 for stability. A feedback capacitor should not be used for this device.
Figure 34. Typical Application Circuit (Adjustable Voltage Version)
11
TPS717XX
www.ti.com
SBVS068A - FEBRUARY 2006 - REVISED MARCH 2006
Output Noise
In most LDOs, the bandgap is the dominant noise source. If a noise reduction capacitor (CNR) is used with the TPS717XX, the bandgap does not contribute significantly to noise. Instead, noise is dominated by the output resistor divider and the error amplifier input. To minimize noise in a given application, use a 0.01F (minimum) noise reduction capacitor; for the adjustable version, smaller value resistors in the output resistor divider reduce noise. A parallel combination that gives 2.5A of divider current will have the same noise performance as a fixed voltage version. Equation 2 approximates the total noise referred to the feedback point (FB pin) when CNR = 0.01F, total noise is approximately given by Equation 2: mVRMS x VOUT VN = 11.5 V (2)
Dropout Voltage
The TPS717XX uses a PMOS pass transistor to achieve low dropout. When (VIN - VOUT) is less than the dropout voltage (VDO), the PMOS pass device is in its linear region of operation and the input-to-output resistance is the RDS(ON) of the PMOS pass element. VDO will approximately scale with output current because the PMOS device behaves like a resistor in dropout. As with any linear regulator, PSRR and transient response are degraded as (VIN - VOUT) approaches dropout. This effect is shown in Figure 21 through Figure 23 in the Typical Characteristics section.
Startup
Fixed voltage versions of the TPS717XX use a quick-start circuit to fast-charge the noise reduction capacitor, CNR, if present (see Functional Block Diagrams, Figure 1). This circuit allows the combination of very low output noise and fast start-up times. The NR pin is high impedance, so a low leakage CNR capacitor must be used; most ceramic capacitors are appropriate in this configuration. Note that for fastest startup, VIN should be applied first, then the enable pin (EN) driven high. If EN is tied to IN, startup will be somewhat slower. Refer to Figure 31 in the Typical Characteristics section. The quick-start switch is closed for approximately 135s. To ensure that CNR is fully charged during the quick-start time, a 0.01F or smaller capacitor should be used. For output voltages below 1.6V, a voltage divider on the bandgap reference voltage is employed to optimize output regulation performance for lower output voltages. This configuration results in an additional resistor in the quick-start path and combined with the noiuse reduction capacitor CNR results in slower start-up times for output voltages below 1.6V. Equation 3 approximates the start-up time as a function of CNR for output voltages below 1.6V: ms tSTART = 160ms + (540 x CNRnF)ms nF (3)
Board Layout Recommendations to Improve PSRR and Noise Performance
To improve ac performance such as PSRR, output noise, and transient response, it is recommended that the board be designed with separate ground planes for VIN and VOUT, with each ground plane connected only at the GND pin of the device. In addition, the ground connection for the bypass capacitor should connect directly to the GND pin of the device.
Internal Current Limit
The TPS717XX internal current limit helps protect the regulator during fault conditions. During current limit, the output sources a fixed amount of current that is largely independent of output voltage. For reliable operation, the device should not be operated in a current limit state for extended periods of time. The PMOS pass element in the TPS717XX has a built-in body diode that conducts current when the voltage at OUT exceeds the voltage at IN. This current is not limited, so if extended reverse voltage operation is anticipated, external limiting may be appropriate.
Shutdown
The enable pin (EN) is active high and is compatible with standard and low voltage, TTL-CMOS levels. When shutdown capability is not required, EN can be connected to IN.
Transient Response
As with any regulator, increasing the size of the output capacitor will reduce over/undershoot magnitude but increase duration of the transient response.
12
TPS717XX
www.ti.com
SBVS068A - FEBRUARY 2006 - REVISED MARCH 2006
Under-Voltage Lock-Out (UVLO)
The TPS717XX utilizes an under-voltage lock-out circuit to keep the output shut off until internal circuitry is operating properly. The UVLO circuit has a de-glitch feature so that it typically ignores undershoot transients on the input if they are less than 50s duration.
+35C above the maximum expected ambient condition of your particular application. This configuration produces a worst-case junction temperature of +125C at the highest expected ambient temperature and worst-case load. The internal protection circuitry of the TPS717XX has been designed to protect against overload conditions. It was not intended to replace proper heatsinking. Continuously running the TPS717XX into thermal shutdown will degrade device reliability. Power Dissipation The ability to remove heat from the die is different for each package type, presenting different considerations in the printed circuit board (PCB) layout. The PCB area around the device that is free of other components moves the head from the device to the ambient air. Performance data for JEDEC lowand high-K boards are given in the Dissipation Ratings table. Using heavier copper will increase the effectiveness in removing heat from the device. The addition of plated through-holes to heat-dissipating layers will also improve the heatsink effectiveness. Power dissipation depends on input voltage and load conditions. Power dissipation (PD) is equal to the product of the output current times the voltage drop across the output pass element (VIN to VOUT), as shown in Equation 4: P D + VIN * VOUT I OUT (4) Package Mounting Solder pad footprint recommendations for the TPS717XX are available from the Texas Instruments web site at www.ti.com.
Minimum Load
The TPS717XX is stable and well-behaved with no output load. Traditional PMOS LDO regulators suffer from lower loop gain at very light output loads. The TPS717XX employs an innovative low-current mode circuit to increase loop gain under very light or no-load conditions, resulting in improved output voltage regulation performance down to zero output current.
THERMAL INFORMATION
Thermal Protection Thermal protection disables the output when the junction temperature rises to approximately +160C, allowing the device to cool. When the junction temperature cools to approximately +140C the output circuitry is again enabled. Depending on power dissipation, thermal resistance, and ambient temperature, the thermal protection circuit may cycle on and off. This cycling limits the dissipation of the regulator, protecting it from damage due to overheating. Any tendency to activate the thermal protection circuit indicates excessive power dissipation or an inadequate heatsink. For reliable operation, junction temperature should be limited to +125C maximum. To estimate the margin of safety in a complete design (including heatsink), increase the ambient temperature until the thermal protection is triggered; use worst-case loads and signal conditions. For good reliability, thermal protection should trigger at least
13
PACKAGE OPTION ADDENDUM
www.ti.com
3-May-2006
PACKAGING INFORMATION
Orderable Device TPS71701DCKR TPS71701DCKT TPS71718DCKR TPS71718DCKRG4 TPS71718DCKT TPS71718DCKTG4 TPS71726DCKR TPS71726DCKRG4 TPS71726DCKT TPS71726DCKTG4 TPS71727DCKR TPS71727DCKRG4 TPS71727DCKT TPS71727DCKTG4 TPS717285DCKR TPS717285DCKRG4 TPS717285DCKT TPS717285DCKTG4 TPS71728DCKR TPS71728DCKRG4 TPS71728DCKT TPS71728DCKTG4 TPS71730DCKR TPS71730DCKRG4 TPS71730DCKT TPS71730DCKTG4 Status (1) PREVIEW PREVIEW ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE Package Type SC70 SC70 SC70 SC70 SC70 SC70 SC70 SC70 SC70 SC70 SC70 SC70 SC70 SC70 SC70 SC70 SC70 SC70 SC70 SC70 SC70 SC70 SC70 SC70 SC70 SC70 Package Drawing DCK DCK DCK DCK DCK DCK DCK DCK DCK DCK DCK DCK DCK DCK DCK DCK DCK DCK DCK DCK DCK DCK DCK DCK DCK DCK Pins Package Eco Plan (2) Qty 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 3000 250 TBD TBD Lead/Ball Finish Call TI Call TI CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU MSL Peak Temp (3) Call TI Call TI Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM
3000 Green (RoHS & no Sb/Br) 3000 Green (RoHS & no Sb/Br) 250 250 Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br)
3000 Green (RoHS & no Sb/Br) 3000 Green (RoHS & no Sb/Br) 250 250 Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br)
3000 Green (RoHS & no Sb/Br) 3000 Green (RoHS & no Sb/Br) 250 250 Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br)
3000 Green (RoHS & no Sb/Br) 3000 Green (RoHS & no Sb/Br) 250 250 Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br)
3000 Green (RoHS & no Sb/Br) 3000 Green (RoHS & no Sb/Br) 250 250 Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br)
3000 Green (RoHS & no Sb/Br) 3000 Green (RoHS & no Sb/Br) 250 250 Green (RoHS & no Sb/Br) Green (RoHS &
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
3-May-2006
Orderable Device
Status (1)
Package Type SC70 SC70 SC70 SC70 SON SON
Package Drawing DCK DCK DCK DCK DRV DRV
Pins Package Eco Plan (2) Qty no Sb/Br) 5 5 5 5 6 6 3000 Green (RoHS & no Sb/Br) 3000 Green (RoHS & no Sb/Br) 250 250 3000 250 Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) TBD TBD
Lead/Ball Finish
MSL Peak Temp (3)
TPS71733DCKR TPS71733DCKRG4 TPS71733DCKT TPS71733DCKTG4 TPS71733DRVR TPS71733DRVT
(1)
ACTIVE ACTIVE ACTIVE ACTIVE PREVIEW PREVIEW
CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU Call TI Call TI
Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Call TI Call TI
The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI's terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products Amplifiers Data Converters DSP Interface Logic Power Mgmt Microcontrollers amplifier.ti.com dataconverter.ti.com dsp.ti.com interface.ti.com logic.ti.com power.ti.com microcontroller.ti.com Applications Audio Automotive Broadband Digital Control Military Optical Networking Security Telephony Video & Imaging Wireless Mailing Address: Texas Instruments Post Office Box 655303 Dallas, Texas 75265 Copyright 2006, Texas Instruments Incorporated www.ti.com/audio www.ti.com/automotive www.ti.com/broadband www.ti.com/digitalcontrol www.ti.com/military www.ti.com/opticalnetwork www.ti.com/security www.ti.com/telephony www.ti.com/video www.ti.com/wireless

▲Up To Search▲

Price & Availability of TPS717XX

	To Download TPS717XX Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .